| 摘要 |
PURPOSE:To eliminate the noise of a deglitch output due to jitter for a deglitch clock, by latching the deglitch clock with a reference clock and controlling a deglitcher with the latched deglitch clock. CONSTITUTION:A reference clock (a) is frequency-divided to form a shift register clock (b) of a serial-parallel conversion circuit 1, a D/A data supply clock (c), and a deglitch clock (e). In a latch circuit 7, the clock (e) is taken as a data input and latched with the clock (a) and a latched output (h) is used as the deglitch clock. As far as the range of jitter of the clock (e) is within a range outside the rising edge of the clock (a), the output (h) is arranged in the rising timing of the clock (a) and the jitter component can completely be eliminated. As a result, an analog signal of the output of the deglitcher 3 has no noise and error component due to the jitter. |
