发明名称 |
PROGRAMMABLE ARRAY LOGIC CIRCUIT |
摘要 |
<p>The specification describes a programmable array of integrated logic circuitry which comprises a plurality of AND gates, a plurality of OR gates, a programmable matrix comprising a plurality of input lines and inputs to the AND gates, non-programmable electrical connections between the outputs of sub-pluralities of the AND gates and predetermined and select individual ones of the OR gates, a gating circuit connected to the output of at least one of the OR gates, a feedback circuit for connecting the outputs of each gating circuit to selected ones of the input lines and an arrangement for gating each of the gating circuits to either disable or enable the OR gate.</p> |
申请公布号 |
CA1144608(A) |
申请公布日期 |
1983.04.12 |
申请号 |
CA19820399708 |
申请日期 |
1982.03.29 |
申请人 |
MONOLITHIC MEMORIES, INC. |
发明人 |
BIRKNER, JOHN M.;CHUA, HUA-THYE |
分类号 |
H03K19/20;(IPC1-7):H03K19/20 |
主分类号 |
H03K19/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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