发明名称 BIT PATTERN GENERATOR
摘要 PURPOSE:To constitute a bit pattern generator economicaly by a method wherein existence of pattern defect on a mask to be used as a negative for printing of the pattern to a wafer to be used for manufacture of IC, LSI is measured using a high speed and small scale circuit enabled to generate a bit pattern in actual time. CONSTITUTION:A mask pattern inspecting device is constituted of a memory 1 storing design data, an arithmetic circuit 2, the bit pattern generator 3, a defect judging circuit 4, a pattern detecting sensor 5, a binary circuit 6, a clock generator 7 and the mask 8 to be inspected. The inspecting device is constituted by this way, output from the sensor 5 is converted into a binary signal in the circuit 6, and binary data (c) are measured in the order of i=0, j=0-n, i=1, j=0-n corresponding to scanning of the sensor 5 to the mask pattern image. Then the addresses XS, XE of the starting point and the finishing point of existence coordinates j of the pattern are computed at every scanning line from respective apex coordinates data stored in the memory 1 by the generator 3, and the reference pattern is formed making binary data outputted from the sensor 5 to synchronize with the clock signal using the generator 3.
申请公布号 JPS5861629(A) 申请公布日期 1983.04.12
申请号 JP19810160173 申请日期 1981.10.09
申请人 HITACHI SEISAKUSHO KK 发明人 NAKAHATA MITSUZOU;KAWAGUCHI IKUO;YAMAGUCHI KAZUO
分类号 G01B21/20;G06F1/03;G06T7/00;G06T11/20;G09G5/42;H01L21/027;H01L21/30;H01L21/66 主分类号 G01B21/20
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