| 摘要 |
PURPOSE:To contrive microminiaturization of IC of IGFET by making the depth from the surface of <110> substrate of opposing conductivity type diffusion layer larger than the width thereof. CONSTITUTION:The field oxide film 12, channel stopper 13, SiO2 gate insulation film 14 and the poly-Si gate electrode 15 are formed on the p type Si substrate 11. The SiO2 film 16 is then selectively formed in the periphery of the electrode 15. When the As ion is vertically implanted with an energy of 150KeV and the surface is activated at a temperature of 950 deg.C, the n<+> layers 17, 18 are formed in the thickness of about 3mum, the channelling effect is cancelled by the film 14 in the vicinity of the electrode 15 and the source, drain layer 19 is formed in the thickness of about 0.2mum. The source, drain layer 19 is covered with the insulation film 20 and the metal wiring 21 is also provided. According to this structure, the layers 17, 18 are formed deeply with a comparatively low energy, and increase of resistance value per unit length can be prevented by forming deeply the such films even when the diffused window size can be reduced up to an extreme limit. Since increase of junction capacitance due to the depth of layers 17, 18 can be negligible, a high speed operation can further be improved by microminiaturization. |
