发明名称 DATA SIGNAL DECODING DEVICE
摘要 PURPOSE:To eliminate the need to modify the constitution of a circuit even in case of the change of a signal speed and variation in the character length of a start-stop signal, by using a character timer which generates a signal with time width which is an integral multiple of the character length. CONSTITUTION:A data signal inputted to a terminal 1 is supplied to a decoding circuit 103 and a polarity monitoring circuit 100. A character timer uses clock pulses which regard the character length of a start-stop signal as unit time, and thus generates a signal with time width which is an integral multiple of the character length, thereby supplying the generated signal to the circuit 100. The circuit 100 sets the decoding mode of the start-stop signal when deciding that the input signal is a high-level successive signal, the decoding mode of a different kind of DC signal when deciding that it is a low-level successive signal, or the decoding mode for holding the past decision mode when the input signal is not successive, thereby performing transmission to the decoding circuit 103.
申请公布号 JPS5860856(A) 申请公布日期 1983.04.11
申请号 JP19810159134 申请日期 1981.10.06
申请人 NIPPON DENKI KK 发明人 TAKAYAMA MICHIO
分类号 H03M5/04;H04L25/24;H04L25/38;H04L25/40 主分类号 H03M5/04
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