| 摘要 |
PURPOSE:To simplify the design of the titled circuit or to adequately design the circuit having no excessive allowance, by installing a redundant fuction which performs 9 logic change by non-reversibly changing the electric potential outputted from the electric potential generating means. CONSTITUTION:An n-channel MOS transistor (TR) Qn2 is connected in series with a TR Qn1 of a C-MOS inverter composed of MOS Trs Qp1 and Qn1, and an output electric potential Vo of an electric potential generating means, whose output electric potential can be changed non-reversibly, is given to the gate of the TR Qn2. In this circuit, when the electric potential Vo is the high electric potential VH of the supply electric potential VDD side, the TR Qn2 always holds ''ON'', and the logical relation becomes the same as the normal C-MOS inverter. On the other hand, when the electric potential Vo is the low electric potential VL of the earthing electric potential VSS side, the TR Qn2 always holds ''OFF'' and its input signal Vin becomes low level and the output signal Vout becomes high level only when the TR Qp1 is turned on. Moreover, when the Vin is at high level, the Vout attains to high impedance condition and unstable. |
