发明名称 INTERRUPTION SIGNAL GENERATING DEVICE
摘要 PURPOSE:To utilize a system resource effectively by generating an interruption signal when a contention of a system bus occurs so as to execute processing not using the system bus by a device with low priority. CONSTITUTION:When a request to use a system bus 21 is outputted from a direct memory access controller (DMAC) 11 while a CPU10 is permitted to use the system bus 21, an interruption generating circuit 12 cancels the permit to use the bus 21 by the CPU10, and also causes an interruption by using an interruption generation line 24. Further, the DMAC11 is permitted to use the bus 21. The DMAC11 uses the bus 21 to start direct memory access. The CPU10, on the other hand, loads an interruption processing program into a local memory 13 to continue the execution of the program on a local bus 20. Therefore, the CPU10 utilizes the resource effectively without interrupting processing.
申请公布号 JPS5856057(A) 申请公布日期 1983.04.02
申请号 JP19810154350 申请日期 1981.09.29
申请人 NIPPON DENKI KK 发明人 SATOU YOSHIKUNI
分类号 G06F13/32;G06F12/00;G06F13/36;G06F15/16;G06F15/177 主分类号 G06F13/32
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