发明名称 CONTROLLING METHOD OF MAIN STORAGE
摘要 PURPOSE:To decrease the occupied time of a main memory, by editing the preceding and next store data to connect them in a body when the coincidence of address is detected between these two continuous store data. CONSTITUTION:The time during which a CPU occupies a main memory is shortened; while the time during which a vector processor VP occupies the main memory is inceased. In this case, a CPU14 gives an access to a main memory 11. If the coincidence is detected between the preceding store data which is accepted at a main memory controller (MCU)12 from the CPU14 and the next store data following the preceding data, the next data is overlapped to the preceding data. Then these two data are unified. As a result, the MCU12 can give an access to the memory 11 with just one store access. Therefore the occupying time of the memory 11 is shortened for the CPU14; while the occupying time of the VP13 increases.
申请公布号 JPS5854478(A) 申请公布日期 1983.03.31
申请号 JP19810152902 申请日期 1981.09.29
申请人 FUJITSU KK 发明人 KOGA SATOSHI
分类号 G06F9/38;G06F12/00;G06F12/02;G06F17/16 主分类号 G06F9/38
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