| 摘要 |
PURPOSE:To perform efficient hash conversion by preventing a titled device from the generation of overlapped normalized outputs between keys having different length each other at the preprocessing of hash conversion of variable length keys. CONSTITUTION:One byte indicating key length is read out from a main storage 8 to a register R2 and sent to a constant generation circuit 9 and a specific constant code to be added to the upper position required for the normalized conversion of the key into a fixed length is outputted from the circuit 9 to a register R3. Then the 1st byte part of the key is read out from the main storage 8 to the register R2. An adder 10 adds the 1st byte of the key to the constant outputted from the register R2 and the added result is stored in the register R3. After that the 2nd byte part of the key is read out from the main storage 8 to the register R2. In the same manner as the 1st byte, the adder 10 adds the value of the register R2 to that of the register R3 and the added result is stored in the register R3. |
