发明名称 METHOD AND APPARATUS FOR TESTING FIXED FUNCTION LOGIC CIRCUITS
摘要 Testing the operation of a fixed function logic circuit 11 is accomplished by connecting the circuit into a feedback shift register divider 10 to form the feedback operator thereof which corresponds to the logic function of the circuit. A fixed input is gated into the divider at each shift after which the contents of the shift register stages gamma r are passed through an XOR tree 12, the output of which is zero on even tests and equal to the fixed input on odd test for correct operation. Detection is at 13 and 14 at times specified by a sequence control 18. Multiple simultaneous testing of related logic circuits and degenerate cases are disclosed.
申请公布号 DE2964891(D1) 申请公布日期 1983.03.31
申请号 DE19792964891 申请日期 1979.06.01
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 WOODWARD, DONALD RAYMOND;MARSHALL, JOHN WILLIAM
分类号 G06F11/08;G06F11/27;G06F11/277;(IPC1-7):G01R31/28;G06F11/00;G06F15/00 主分类号 G06F11/08
代理机构 代理人
主权项
地址