| 摘要 |
An analog signal VA representing the measured output of a condition responsive transducer is supplied to a dual slope integrating analog-to- digital converter 12 also receiving a regulated constant reference signal VA from which a signal Vmax is derived. Using an integrator 18 in a non- inverting mode, the A/D converter in sequence first integrates (Vmax-VA) for a fixed time period Tr and then integrates the sum of the first integrated signal and the reference signal VA for a variable time period TX down to VR as detected by a comparator 20. During integration, digital counts VD proportional to the variable integration period are accumulated and emitted for operating a digital device such as a digital display. Digital linearization of the converter output can optionally be provided by use of a programmed micro-computer reading a programmable-read-only- memory (PROM) to run a variable frequency clock. The clock is regulated to effect a first phase converter time corresponding with an even multiple of the power line frequency. <IMAGE> |
