| 摘要 |
A time base converter for compressing or expanding the time base of an input digital signal comprises a data input terminal; a digital output circuit; a number n of memory banks for storing the input digital signal which is written therein at a write clock frequency and read out therefrom at a read clock frequency, and having a memory cycle with a writing phase and a reading phase in each period thereof and which is synchronized with the read clock, with the write clock frequency and the read clock frequency being different from one another; a number M of input latches in series between the data input terminal and each respective memory bank for gating to the latter a group of data words of the input digital signal in parallel, each input latch having a number N of channels, each channel processing a predetermined subgroup of the group of words; and an output latching circuit to couple the memory banks to the output circuit. In order to prevent loss of the input digital signal when the read clock frequency is lower than the write clock frequency, n, N, and M are selected to be appropriate positive integers, preferably to satisfy the inequality <IMAGE> where TW and TR are the periods corresponding respectively to the write clock frequency and the read clock frequency.
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