| 摘要 |
PURPOSE:To reduce spaces among an electrode and a first and second conductive regions up to sub-micron regions, and to improve a high-frequency characteristic by utilizing a fact, etc. that the directional property of ion implantation and the resist on a minute convex section can be introduced more than the convex section and the resist on a metal has the high efficiency of exposure regarding the manufacture of the MES FET. CONSTITUTION:n Type conductive impurity ions are implanted in a GaAs substrate 21 and an n type conductive layer 22 in high concentration while using a metallic pattern 24 as a mask, and source-drain regions 27, 28 are formed through annealing. When the surface is coated with the positive type photo- resist 29 and the whole surface is exposed, only a region 30 is exposed sufficiently by a fact that the thickness of the resist 29 on the metallic pattern 24 is thin and the efficiency of exposure is high because beams are reflected by the metallic pattern 24, and the metallic pattern 24 is exposed through the complete removal of the region 30. The window 31 of a gate is formed by removing the metallic pattern 24 and an insulating film 23 through etching, and the gate electrode 32 aligned with the source-drain regions 27, 28 is shaped. |
