发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To obtain a logical circuit which has a high speed of operation and a small level of power consumption, by performing the switching after turning off two transisors connected in series in the on-off or off-on switching mode. CONSTITUTION:For the on-off threshold voltage of the 1st and 2nd phase splitting transistors TR12 and 13, the TR12 is set at a higher level of the TR13. When the signal of an input part 11 is set at a low level, the voltage of an output terminal 26 is set at a high level of output. When the signal of the part 11 is shifted to a high level, the TR13 is turned on and an output TR15 is turned off. Then the TR12 is turned on and an output TR14 is turned on respectively. Thus the output voltage is set at an earth potential. The output TRs are switched after they have been turned off even if the input is set at a low level. The speed of operation is accelerated, and the level of power consumption is lowered both in the transient and steady modes. This can decrease the current capacity of a power supply.
申请公布号 JPS5853227(A) 申请公布日期 1983.03.29
申请号 JP19810152674 申请日期 1981.09.26
申请人 FUJITSU KK 发明人 TANIZAWA SATORU
分类号 H03K19/088;H03K19/013 主分类号 H03K19/088
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