发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To avoid rewrite, by constituting a source terminal of an FET is connected to a data bus, drain and gate terminals are connected to input terminals of an RAM drive circuit and the drive circuit is floated with an input signal at the gate terminal. CONSTITUTION:When a word line is selected and an RAM cell 24 is not bit-set or bit-reset, a gate input 32 of a TR 33 goes to high level and no data is inputted from a data bus 34. Since a high level of the gate input 32 is an input of a 2-NORs 35, 36, outputs 30, 31 of each drive circuit are floated, the potential balancing of bit lines 26, 27 is not disturbed, the content written in the RAM 24 before is held and rewrite is made unnecessary.
申请公布号 JPS5853083(A) 申请公布日期 1983.03.29
申请号 JP19810151711 申请日期 1981.09.25
申请人 NIPPON DENKI KK 发明人 SASE RIYUUICHI
分类号 G11C11/417;G11C7/00;G11C11/413 主分类号 G11C11/417
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