发明名称 MEMORY REFERENCE SYSTEM
摘要 PURPOSE:To prevent change in the content of a control memory, by providing a signal line transmitting a write inhibition signal to a control memory and a gate controlling the transmission of a write pulse with the write inhibition signal between a service processor and a host computer. CONSTITUTION:In a controller 8 of a replacement memory 7, a read line controller 14 controls readout/write with an instruction from an instruction processing section 6. When a write instruction comes, the controller 14 starts a write pulse generator 15 to produce a write pulse, which is given to a gate 16. The gate 16 is provided with a write inhibition signal line to which a write inhibition signal iNHW is inputted. The gate is opened with ''0'' and closed with ''1'' to control the transmission of write pulse. Thus, the memory can be referenced without increasing an amount of the hardware and changing the content of the control memory.
申请公布号 JPS5853076(A) 申请公布日期 1983.03.29
申请号 JP19810151049 申请日期 1981.09.24
申请人 FUJITSU KK 发明人 AIZAWA TERUO;ETSUNO MINORU
分类号 G06F11/28;G06F12/10;G06F12/14;G06F12/16;G06F21/02 主分类号 G06F11/28
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