| 摘要 |
<p>PURPOSE:To save power consumption at a terminal device, to make the size of a battery small and to extend the power failure compensating time, by generating a clock pulse with a starting pulse outputted after a start pulse without generating the clock pulse at all times at a terminal device. CONSTITUTION:A plurality of terminal devices are connected to two communication wires 1 in multi-drop form and a start pulse S1 with a prescribed signal width is applied from a central device to each terminal device. This pulse S1 is inverted at an inverter 4 at each terminal device and applied to the 1st and 2nd FFs 7, 9 and the input to the FF7 is gradually controlled with a time constant circuit consisting of a capacitor 6 and a resistor 5. The FFs 7, 9 and a timer 8 detect the trailing of a start pulse S2 after the pulse S1, an output of the FF9 starts a clock pulse generating section 10 to generate a clock pulse. An address detection section 12 detects the coincidence with an address signal S3, a control section 13 takes synchronism with the central device, allowing to reduce the power consumption of terminal devices.</p> |
