Bus control unit for a VLSI processor and method for operating it

摘要

A bus control unit for a VLSI function unit which exhibits two internal buses (A bus, B bus) is intended to provide for fast information transfer between the two internal buses (A bus, B bus) and an external bus (32), high packing density, a low number of switching elements, high regularity and thus simple implementation of the integrated system and low costs in the development and production of a VLSI system. According to the invention, a bus control unit exhibits a correspondingly configured precharging circuit (7-13) in connection with a fast input driver (30) and an output circuit which only contains one tristate driver (29) and one switching transistor (26). <IMAGE>