发明名称 Static semiconductor memory with reduced components and interconnections
摘要 Disclosed is a static semiconductor memory which is comprised of a pair of cross-coupled switching means forming a set-node, a reset-node, and a common-node; and a pair of variable conductance means. Each of the variable conductance means are characterized as having first and second terminals with negligible conductance therebetween when the voltage thereacross is less than a predetermined breakdown level, and as having substantial conductance when the voltage thereacross exceeds the breakdown level. The first terminals of the pair of variable conductance means are coupled respectively to the set-node and reset-node. A pair of bit lines are coupled respectively to the second terminals on the pair of variable conductance means; and a word line is coupled to the common-node.
申请公布号 US4377856(A) 申请公布日期 1983.03.22
申请号 US19800178301 申请日期 1980.08.15
申请人 BURROUGHS CORPORATION 发明人 ROESNER, BRUCE B.
分类号 G11C11/412;(IPC1-7):G11C11/40 主分类号 G11C11/412
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