| 摘要 |
PURPOSE:To prepare and test a program within a short time by controlling a resistor for controlling a part or the whole addresses to be written in a testing device memory by a test pattern generating program independently of the addresses to be supplied to DUT. CONSTITUTION:Addresses decided by an address signal phi23 outputted from a pattern generator PG201 and a signal phi24 for controlling defective address and bit testing device memory (TDM) addresses are recorded in a TDM207 as defective addresses. Since the signal phi24 can be controlled by a test pattern generating program independently of the addresses to be supplied to a DUT, the point of reading-out time causing the generation of a defect in the test pattern can be discriminated by only one execution of the test pattern and recorded in the TDM207 if a different TDM address controlling signal phi24 is specified in each reading-out when the operation for reading out the same address in the DUT plural times is included in the test pattern. |
