发明名称 FRAME SYNCHRONIZING DEVICE
摘要 PURPOSE:To realize a quick and automatic recovery to the normal state for a time division multiplex transmission line, by shifting immediately a comparing pattern generating circuit to a specific state when it is detected that the said generating circuit exists in an inhibition region. CONSTITUTION:The pattern of a 2<n>-1 pseudo random pattern generating circuit 2 having a higher operation speed than a comparing pattern generating circuit 1 is compared with the pattern of the circuit 1 through a comparator 3. Then a coincidence signal is fed to a resetting circuit 4 when the coincidence is obtained between both patterns. The decoders 5 and 6 which receive the pattern from the circuit 2 transmit signals (b) and (c) to an FF7. The FF7 feeds the inhibition region signal (d) showing an inhibition state to the circuit 4 in a period during which the FF7 receives the signal (c) after receiving the signal (b), i.e., in a period of a pattern state in the inhibition region where the circuit 2 is not used as a frame synchronizing pattern. When the circuit detects that the state of the circuit 1 is identical with the state of the inhibition region, the circuit 4 feeds the reset signal (e) to the circuit 1 to set the circuit 1 to a specific state.
申请公布号 JPS5846740(A) 申请公布日期 1983.03.18
申请号 JP19810144897 申请日期 1981.09.14
申请人 NIPPON DENKI KK 发明人 FUKAZAWA YASUO
分类号 H04J3/06 主分类号 H04J3/06
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