| 摘要 |
PURPOSE:To prevent the output from being floated, by applying a complementary address signal to a gate of a load MISFET of a dynamic flip-flop. CONSTITUTION:An address input signal Ai is applied to a gate of a MISFETQ5 which is one input to a dynamic flip-flop circuit consisting of insulation gate field effect transistors (MISFET)Q2-Q5. A complementary output A' of the flip- flop circuit is applied to the gate of the MISFETQ5 of an inverter circuit consisting of MISFETQ6, Q7, and an output A of the flip-flop is applied to the gate of a MISFETQ8 of the inverter circuit consisting of MISFETQ8, Q9. An output ai of an inverter circuit (consisting of the Q8, Q9) is applied to the gate of the MISFETQ7 and an output ai' of the inverter circuit (consisting of the Q6, Q7) is applied to the MISFETQ9. |
