发明名称
摘要 PURPOSE:To obtain small sized and economized titled device, by providing a scanning circuit scanned in word unit, a data input section, an input buffer register, a detection circuit and a read buffer register. CONSTITUTION:A timing circuit 9 gives a set signal and a word clock signal for a buffer register (IBR)16. A detection circuit 12 repeats scanning of words via a driver 15. When the switch turns on at the 4th word, the data is stored in the IBR16 and an RBR17. On the other hand, the detection circuit 12 stops the advancement of a counter 13 with the output data detection of the IBR16. The detection circuit 12 stops the clock to the RBR12 through the storage to an RBR17 for the stopping of data renewal. The data in the RBR17 is outputted to the bus. When an on-signal is given to the words, the signal is detected and only the word gives output, then input circuits only for one word's share can be provided.
申请公布号 JPS636896(B2) 申请公布日期 1988.02.12
申请号 JP19810062130 申请日期 1981.04.24
申请人 FUJITSU LTD 发明人 AKIMOTO SHUICHI
分类号 G06F3/02;G06F3/023;G06F9/00;G06F13/22;G06F17/40 主分类号 G06F3/02
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