发明名称 BIPOLAR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the current of a parasitic P-N-P transistor, also reduce the current flowing into a substrate, prevent a thyristor to become conductive and also prevent latch-up by forming the high concentration N<+> diffusion region in such a depth as reaching the N<+> buried region in the periphery of a P type region which is formed within an N type epitaxial layer connected to the power source and is also connected to the input/output pad. CONSTITUTION:The N<+> diffusion region 35 which is sufficiently higher in concentration than that of an epitaxial layer 32 is formed in such a depth as reaching an N<+> buried region 34 in the periphery of a P type diffusion region 33, a region 36 is formed simultaneously with the emitter diffusion region of an N-P-N transistor in such a way as partly overlapping, then a contact window 37 is formed in order to connect an epitaxial layer 31 to the power source and wiring is carried out with a metal wiring 38. Thereby, the current amplification coefficient of the parasitic P-N-P transistor, where the P type diffusion region 33 operates as the emitter, the epitaxial layer 32 as the base and the substrate 40 as the collector, can be reduced.
申请公布号 JPS5843560(A) 申请公布日期 1983.03.14
申请号 JP19810142082 申请日期 1981.09.08
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MORI TOSHIKI;SHIBATA ATSUSHI;YAMADA HARUYASU
分类号 H01L27/04;H01L21/331;H01L21/822;H01L27/02;H01L27/06;H01L29/73;H01L29/866 主分类号 H01L27/04
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