发明名称 MULTI-CHIP LSI PACKAGE
摘要 <p>PURPOSE:To enable the low impedance of power source wirings and the high speed operation through reduction of noise due to power supply by utilizing the multi wiring layer provided in the internal layer of a laminated ceramic substrate as the power source conductor wiring. CONSTITUTION:The through hole pads 7 connected to through holes 12 and terminating resistors 8 are formed on the surface of substrate 9 and input/output terminals 11 are provided at rear side. The terminals 11 are bazed so that they are connected to the through holes 12. A multi wiring layer 5 is formed covering the terminating resistors 8 and through hole pads 7 and accommodates multi wirings 6. Terminals of an LSI chip 1 are connected by bonding within a chip carrier 2 which is connected to a connecting pad 4, thereby connection to the multi wirings 6 within the multi wiring layer 5 can be established.</p>
申请公布号 JPS5843553(A) 申请公布日期 1983.03.14
申请号 JP19810141934 申请日期 1981.09.08
申请人 NIPPON DENKI KK 发明人 WATARI TOSHIHIKO
分类号 H05K3/46;H01L23/538;H01L23/64 主分类号 H05K3/46
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