| 摘要 |
The input signals are input into a memory (SP1) not at equidistant time intervals but only when an input signal has changed. In this case, the count of a timer (ZZ1) is input as time value together with the input signals or their changes. From the time values in each case read out of the memory (SP1), times are formed during which the associated output signals are maintained. The field of application is logic analysers. <IMAGE>
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