发明名称 PROCESS CONTROLLING SYSTEM
摘要 PURPOSE:To reduce a load on software by performing successive time control over a process output circuit, used for a word-serial bit-parallel system, through hardware, and interrupting a microprocessor. CONSTITUTION:A microcomputer device 6 consists of a microprocessor MPU7, a process output controller 8 which has a function of performing time control over RDY control and a transmission rate, and a clock pulse generator 9. The process output controller 8 consists of a clock counting circuit 10, an RDY control circuit 11, a command detecting circuit 12 for detecting a command signal outputted when the MPU7 writes information, a storage circuit 13 for the state wherein information is being outputted, a process output circuit 14 for outputting information, and an interruption generating circuit for causing an interruption a transmission time later.
申请公布号 JPS5840617(A) 申请公布日期 1983.03.09
申请号 JP19810139313 申请日期 1981.09.04
申请人 TOKYO SHIBAURA DENKI KK 发明人 NOZAWA ISAO
分类号 G05B15/02;G05B15/00 主分类号 G05B15/02
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