发明名称 ARITHMETIC PROCESSOR
摘要 PURPOSE:To simplify circuit constitution, and smaller in size of an arithmetic processor, by obtaining an output signal, generated as a result of arithmetic processing, in the form of an analog signal through programming. CONSTITUTION:A control signal 2 with time width T1 and a data symbol 3 from an analog-digital converter, etc., are applied to a microcomputer 1. Then, a timer incorporated in the computer 1 sections an arithmetic processing time by periods T and further sections the periods into time areas A and B, and C. At this time, when time length T1 is set longer than period length T, a control signal 2 is applied to the area A in the period T, so the signal is inputted to generate a control input signal with time length T2, thereby processing the symbol 3 in the succeeding area B according to a prescribed program which corresponds to the signal 2. Then, part of the digital signal is D/A-converted in the succeeding area C. Namely, output ports 5 and 6 are changed from a logical level (0) to a logical level (1) on the transition from the area B to the area C, and held at the high logical level (1) throughout the area C.
申请公布号 JPS5840654(A) 申请公布日期 1983.03.09
申请号 JP19810137793 申请日期 1981.09.03
申请人 CANON KK 发明人 SUZUKI KOUJI;NAGAHIRA JIYOUJI;KURODA KOUKI
分类号 G06F3/05;(IPC1-7):06F3/05 主分类号 G06F3/05
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