| 摘要 |
A digital squelch circuit taking the received audio signal and generating a digital train of pulses representing zero crossing characteristics of the received signal with, for example, if the signal is greater than zero, a logic level one being generated and if it is less than zero, a logic level zero being generated. The processed signal is then repeatedly sampled for predetermined time intervals via a counter (or a charging sample and hold circuit) to determine the time measured apparent zero crossing frequency. The time measured apparent frequency is then used repeatedly to gate and ungate the squelch.
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