| 摘要 |
PURPOSE:To make small the delay of signal propagation by improving high integration density and short-cutting wiring length through the such element arrangement of field effect transistors of the same conductive channel that they are stacked vertically. CONSTITUTION:N channel MOSFET's, T1, T2, T3 are vertically connected at both the source and drain sides with the wiring layers 1, 2, 3 and 4. The power source line VSS is extended from the source side of the upper most layer III. P channel MOSFET's, T1', T2', T3' are connected vertically at the source of the lowest layerIand the source of the intermediate layer II, and with the drain of the intermediate layer II and the source of the upper most layer III respectively by the wiring layers 5 and 6. From the drain side of the upper most layer III, the power source line VDD is extended. In both N channel and P channel sides, the same conductive layers are stacked vertically resulting in the overlapping areas. The N channel side and P channel side are connected at the lowest layerIwith the wiring layer 7. |
