| 摘要 |
PURPOSE:To detect a failure of a control program directly, by checking the control program with a data revising and detecting circuit, at each accessing of a controller for instruction fetch by the control program. CONSTITUTION:An address bus 4 is connected to an address detecting circuit 5 and a data revision and detecting circuit 5 detects the revision of data outputted from an address detection circuit 5. On the other hand, the data revision and detecting circuit 6 is a circuit which detects the continuity of the output data from the circuit 5 and consists of a counter 61, a register 62, and a comparator 63. The content of the counter 61 is incremented one by one with a control signal 7 outputted from the circuit 5 and the control signal 7 and a data 8 store the data from the circuit 5 in the register 62. Further, the comparator 63 detects the continuity of data by comparing the content of the counter 61 and the resister 62. |
