| 摘要 |
PURPOSE:To improve the performance, by providing a control information transfer means between processors and executing a duplicated processor switching instruction added to a system management processor for an exclusive instruction for a duplicated processor switching. CONSTITUTION:A processor switching instruction is sequence-controlled via a universal bus 101. The processor switching instruction consists of an order section and a switching processor designation section. The order section is switched at a decoder 1002 and the processor designation section is interpreted at a decoder 1003. In switching processors from a duplicated processor 102 to a 103, first, the switched processors 102 and 103 are stopped. The content of a processor instruction executing control register group 1021 is transferred to a register group 1031 in the 103, allowing to take over a JOB under processing in the processor 102 to the processor 103. |
