| 摘要 |
PURPOSE:To efficiently process each CPU, by storing processing requests in the order of generation of the requests and reading out the processing requests in the order of storage. CONSTITUTION:When a processing request is applied from a CPU to an information processing unit IPU1, this request is stored in a processing request memory 40 of the IPU1 via interfaces IF31-38. The possibility of use of the IPU1 is informed to the CPU executing the processing via the specific IF31-38 to enter the information processing. If a processing request is given from other CPU during the execution of the processing, the CPU receives a BSY signal indicating the use of the IPU1. A reservation reception and response circuit 50 receives the information via a signal line (a) that the section 40 receives the processing request of the CPU. The information is outputted to a signal line (b) with the circuit 50, which responds to the corresponding CPU via the corresponding IF 31-38 for the reception of the processing request. |
