| 摘要 |
PURPOSE:To improve operating speed of an element which is disposed in three dimensions and to increase the integration of a semiconductor device by connecting the element via a low resistance wire pattern, thereby decreasing the wiring capacity. CONSTITUTION:After an N type diffused layer 2 is formed on the main surface of a P type substrate 1, an N type first vapor growth region 3 is formed. A diode 5, a transistor 6 and a resistor 7 are respectively formed in isolated vapor growth layers 3', 3'', 3''' via P type diffused layers 4, 4', 4'' in the region 3. An aluminum or aluminum alloy series first wire pattern 9 is formed through the first insulating layer 8 on the layer 3, and are suitably connected to the layer 3. Subsequently, the second insulating layer 10 is formed on the upper surface. Then, the second vapor growth region 11 is formed on the upper surface, and a transistor 11' and a diode 11'' are formed. Further, similar formation is repeated, thereby forming the third and other layers which follow. |
