| 摘要 |
PURPOSE:To elevate use efficiency of an operand address register, and to smoothly execute an instruction, by providing a counter for indicating the number of instructions to be used, on each operand address register. CONSTITUTION:A pointer 18 indicates a number of an operand address register (OA) to be used in the next time, and executes switching for storing a result of calculation in an address calculating part 7 in the OA of the number indicated by the pointer 18, by a selecting circuit 20. In an address comparing part 12, whether an operand address outputted from the address calculating part 7 is already stored in one of OAA8-OAD11 or not is detected. In case when it is already stored, it is inputted to a corresponding queue register IQ. Unless it is stored in any operand address register, an output of the address calculating part 7 is stored in the OA of the number indicated by the pointer 18, and also the number of its OA is selected by a selecting circuit 21, and is inputted to a corresponding IQ. |
