| 摘要 |
PURPOSE:To reduce power consumption, by connecting a load capacity between plural transistors driven by an alternating signal and its antiphase signal, and connecting a parallel circuit consisting of a capacitor having a large time constant and a resistance, to the final end. CONSTITUTION:Plural transistors 12, 13 are connected in series, one terminal of the transistor 12 is connected to an electric power source VDD, and also between each transistor, a load capacity 14 is connected. Subsequently, to the transistor 13 and the transistor 12, an alternating signal CL of a constant period, and an antiphase signal of the signal CL by an invertor 11 are applied, respectively, and they are driven. Also, to each final end of the transistors 12, 13, a capacitor 15 is connected. Now, when the transistor 12 is turned on and the load capacitor 14 is charged, and subsequently when the transistor 13 is turned on and the capacitor 15 is charged, a detecting signal Fst becomes low. When oscillation stops, the capacitor 15 is discharged by a high resistance 16, and the signal Fst becomes high. |
