摘要 |
PURPOSE:To elevate accuracy of conversion and its speed, by setting the second constant-current value generated in the period for responding to pulse width, to the first constant-current value, in accordance with weight of a lower bit against an upper bit. CONSTITUTION:A digital signal which has set that which has quantized an analog signal by (n) bits, to an upper bit, and has set that which has further quantized an error portion due to quantization, to a lower bit is divided into the upper bit and the lower bit, which are set to pulse width signals P1, P2, respectively. Subsequently, the pulse width signals P1, P2 and its inverted signals -P1, -P2 are inputted to an analog voltage forming circuit 7, drive differential amplifiers 8, 9, and control currents I1, I2 of constant-current circuits 10, 11. In this case, the constant-currents I1, I2 set the current I2 to the current I1 in accordance with a difference of weights of the upper bit and the lower bit. |