发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent device breakdown due to a parasitic effect by a method wherein a low value resistor is connected across the device emitter and the substrate lowest potential portion, in a device, of the multiplicity of devices using as collector the thin epitaxial layer on the substrate, wherein the collector potential is lower than the forward voltage at its own p-n junction. CONSTITUTION:A multiplicity of collector-forming thin n epitaxial layers 2 are scattered on a p type Si substrate 1, and p bases 3 and n emitters 4 are provided within the layer 2. The epitaxial layer 2 with a resistance of several tens of ohms is used as a resistor, the base and collector of the transistor 15 are short- circuited 9 to form a diode 15, and the emitter 4 is connected to a wiring metal electrode 10 (the lowest potential). When disturbance is introduced into the circuit and thereby an SCR effect works to trigger an arc, the voltage thereof falls (to a level sufficiently lower than the base-emitter forward bias voltage) due to the resistor 16, and the emitter potential and then the collector potential of the diode 15 rises. Accordingly, the forward bias from the substrate 1 to the collector is at once reversed, eliminating horizontal npn elements, the SCR effect and excess current, thereby preventing breakdown.
申请公布号 JPS5830143(A) 申请公布日期 1983.02.22
申请号 JP19810128578 申请日期 1981.08.14
申请人 MATSUSHITA DENKI SANGYO KK 发明人 SHIBATA ATSUSHI;MORI TOSHIKI;TAKEMOTO TOYOKI
分类号 H01L27/06;H01L21/76;H01L21/761;H01L21/8222;H01L27/02 主分类号 H01L27/06
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