| 摘要 |
PURPOSE:To improve the reliability of system, by reading out an instruction stored in another processor in advance in place of an instruction of a processor in failure for transfer. CONSTITUTION:Information relating to a failed processor O is stored to a memory MA based on the information from a failure controller AL. On the other hand, a processor AP reads a normal program and a data to be given from an input and output device IO to the processor O to a memory MB via a processor IOC. A readout instruction of a memory MCO is transmitted to the processor O via a line (o) of the controller AL and the program and data of the memory MCO are transmitted to the memory MA via a bus coupler CO. When the data and the like are transmitted for a prescribed amount, the processor AP reads out the program and data corresponding to the same part in the MB and compares the both. As a result, if a different part exists in the both, the information is arranged and outputted to the device IO. |
