| 摘要 |
PURPOSE:To perform the sampling accurately, by setting the delay time of a delay circuit, which delays a command signal for conversion operation to apply it to a sampling holding circuit, from the external. CONSTITUTION:When the operation start is commanded by a controlling circuit CONT, a programmable counter PC performs the subtracting operation by a clock signal CLK and transmits a flag signal F for the carry output. The flag signal F is applied to a sample holding circuit SH, and the input analog signal from a multiplexer MPX is sampled and held and is applied to a comparator CP. The output of the comparator CP is stored in a register REG, and the converted digital signal is sent to a data bus DB through a buffer BUF. The set value of the programmable counter PC is set from the external, and thus, a time sufficient for sampling is obtained. |
