| 摘要 |
PURPOSE:To increase the current consumption of a voltage detecting circuit only during detecting operation while suppressing it during other operation, by connecting a CMOS logical element in series to the voltage detector which has less output voltage variation than power-supply voltage variation. CONSTITUTION:In a voltage detector 4 applied with a power-supply voltage VB, a resistance R is so set that a voltage VD drops more slowly that the power- supply voltage VB, so the power consumption of this voltage detector 4 is small. On the other hand, the threshold level Vth of a CMOS inverter L1 applied with the power-supply voltage VB is nearly by half of power-supply voltage. If the power-supply voltage VB drops and the voltages VD and Vth come cross at a to time, the inverter L1 operate and the output level varies from a state H to a state L to increase the current consumption (i) of the detecting circuit 4 in a pulse shape. Consequently the drop of the terminal voltage is speeded when the battery is nearly consumed to improve the terminal voltage characteristics in the life termination period of the battery. |
