发明名称 DATA OUTPUT DEVICE
摘要 PURPOSE:To decrease the man-power for design, by providing general-purpose performance for the connection with an external device, through the addtion of the hardware such as a shift, register and a selection circuit to a data output device provided between an electronic computer and an externally connected device. CONSTITUTION:A CPU is connected to a data output device 1 via an input/ output bus 7 and when a clock signal is transmitted from a main control section 3 to a shift register 2 of the device 1 and the register 2 receives data from the CPU8, and the data are serially transferred to a buffer register 4 frm a data line 14 in synchornizing with a clock signal 13 from the control section 3. The output stored in the register 4 is seleted at a selection circuit 5 receiving a control signal 16 of the selection circuit from the control section 3 and required bits in the output are picked up. The output of the circuit 5 is transmitted to an external connecting device 21 via an output circuit 6. An output strobe signal 17 is transmitted from the control section 3 to a device 21 and the required bits are stored in the register 4 at the control section 3 and the control signal 16 is transmitted to the circuit 5.
申请公布号 JPS5824940(A) 申请公布日期 1983.02.15
申请号 JP19810122441 申请日期 1981.08.06
申请人 TOKYO SHIBAURA DENKI KK 发明人 NISHITANI MASAMI
分类号 H03M7/00;G06F13/12;G06F17/50 主分类号 H03M7/00
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