发明名称 Divisor transform type high-speed electronic division system
摘要 An electronic network division system is operated responsive to signals representing divisors and dividends. An input divisor signal is divided into a given number (N) of integers, the number (N) being selected on a basis of a desired accuracy index. Each divided signal is a transform of a divisor which is read from one of (N) number of read-only memories, there being a separate read-only memory for each of the given number (N) of integers. Each of said given number of transformed divisor signals is separately multiplied by a dividend signal to produce (N) number of multiplication products. Each of these multiplication product signals is divided into high and low subproduct signals and applied to a corresponding one of (N) number of adders. A high subproduct signal from one multiplication product is added in the adding means to a low subproduct signal from another multiplication product.
申请公布号 US4374427(A) 申请公布日期 1983.02.15
申请号 US19800194838 申请日期 1980.10.07
申请人 KATAYAMA, AISUKE 发明人 KATAYAMA, AISUKE
分类号 G06F7/508;G06F7/52;G06F7/53;G06F7/535;(IPC1-7):G06F7/52;G06F7/54 主分类号 G06F7/508
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