发明名称 SYNCHRONISM MATCHING SYSTEM FOR DATA COMMUNICATION SYSTEM
摘要 <p>PURPOSE:To ensure an assured matching of synchronism for each channel, by setting forcibly a counter that counts the receiving clocks at a prescribed level when a synchronizing counter reaches the prescribed value. CONSTITUTION:The same pattern for matching of synchronism is inserted through an FF113 and transmitted to plural channels of each period. Each node device detects the received synchronism matching pattern, and the number of receiving clocks produced from the receiving information obtained after the detection of said pattern is counted by a synchronizing counter 106. Then the signal is produced after detecting through a coincidence circuit 102 that all synchronism matching patterns are received continuously. When the counter 106 reaches the prescribed value, the counter 114 counting the receiving clocks is forcibly set at a certain level.</p>
申请公布号 JPS5821944(A) 申请公布日期 1983.02.09
申请号 JP19810119068 申请日期 1981.07.31
申请人 HITACHI SEISAKUSHO KK 发明人 HIYAMA KUNIO;KAWAKITA KENJI;TAKADA OSAMU
分类号 H04L7/00;H04L12/00 主分类号 H04L7/00
代理机构 代理人
主权项
地址