发明名称 INTERFACE CIRCUIT
摘要 PURPOSE:To pervent the effect of a time delay caused by the working of a transistor, by actuating a transistor in an active region to control the working of another transistor that produces an output signal. CONSTITUTION:The collector voltage of a transistor TRQ2 is clamped by the emitter voltage of a TRQ5. The base voltage of the TRQ5 is set constant by the collector voltage VL of a TRQ6 of a constant voltage circuit 31. Thus it is always possible to actuate the TRQ2 in an active region by setting each resistance value of the resistances R3 and R4 at a prescribed value. As a result, a current I2 flows to the collector of the TRQ2 at a time point when an input signal P has a rise temporarily, and at the same time a current I1-I2 is supplied to the base of a TRQ4. Thus the voltage VO has a rise with no time delay, and an output signal OUT has a fall. The signal OUT has a rise with no time delay also when the signal P has a fall.
申请公布号 JPS5821926(A) 申请公布日期 1983.02.09
申请号 JP19810120131 申请日期 1981.07.31
申请人 TOKYO SHIBAURA DENKI KK 发明人 OOTA MASAKI
分类号 H03K19/018;H03K5/02;H03K19/013 主分类号 H03K19/018
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