发明名称 |
Semiconductor integrated circuit device |
摘要 |
A semiconductor integrated circuit device of an I2L type is disclosed. In this device, in order to clamp the potentials of bit lines at a desired level, a bit line clamp circuit comprising at least one dummy cell for which the fluctuation of characteristics induced by manufacturing processes are relative to those of the memory cells of an I2L type is provided.
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申请公布号 |
US4373195(A) |
申请公布日期 |
1983.02.08 |
申请号 |
US19800200217 |
申请日期 |
1980.10.24 |
申请人 |
NIPPON TELEGRAPH & TELEPHONE |
发明人 |
TOYODA, KAZUHIRO;ONO, CHIKAI;HAYASHI, TOSHIO |
分类号 |
G11C11/414;G11C7/00;G11C11/411;G11C11/416;H01L27/102;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/414 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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