| 摘要 |
PURPOSE:To increase dielectric resistance by isolating a substrate by an N<-> type layer extending toward the center from one peripheral section of the substrate and an N<+> type layer extending from a peripheral section at the opposite side and using a P type layer held between the N<-> type layer and the N<+> type layer as resistance value between the base and emitter of an NPN transistor. CONSTITUTION:A transistor Q1 at the input side employing a P type layer 2' as a base and a transistor Q2 at the output side are isolated by the N<-> type layer 3 extending toward the center section from one peripheral section of the substrate and the N<+> type layer 6 extending from the peripheral section at the opposite side. The P type layer 5 held between these N<-> type layer 3 and N<+> type layer 6 is used as the parallel resistor R1 between the base and emitter of the transistor Q1. The width W' of the P type slender form section 5 as the resistor R1 is not affected by the scattering of the etching of the peripheral sections of the substrate and is easily controlled according to the position of the N<+> type diffusion layer 6, and can be formed in thin width, and desired R1 cab be obtained, thus improving the characteristic of the high dielectric resistance of the Darlington transistor. |
