发明名称 SEALING METHOD FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To improve the sealability and the electric characteristics of an integrated circuit by coating an adhesive on the sealed part of a hollow package and then defoaming it under reduced pressure. CONSTITUTION:A substrate 3 and a cover 4 formed of synthetic resin are bonded with a liquid epoxy resin adhesive 5 at an ambient temperature, and a transistor chip 1 is sealed in the hollow package. Then, a hollow package is stationarily placed in a pressure resistant container, which is evacuated via a vacuum pump to be reduced to 150mm.Hg. Then, the operations to return to the normal pressure are repeated twice, thereby defoaming the adhesive.
申请公布号 JPS5815257(A) 申请公布日期 1983.01.28
申请号 JP19810113031 申请日期 1981.07.21
申请人 DENKI KAGAKU KOGYO KK 发明人 KATOU KAZUO;NAKANO TATSUO;TORIGOE TAKASHI;ASAI SHINICHIROU
分类号 C09J5/00;C09J5/06;H01L21/50;H01L23/02 主分类号 C09J5/00
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