发明名称 DATA PROCESSOR FOR LOGICAL SIMULATION
摘要 PURPOSE:To constitute a system suitable for a logical simulation, by constituting a status section storing connecting information of a logical circuit and the circuit status with a plurality of storage blocks and operating units so that a parallel processing can be possible for the operation. CONSTITUTION:A control section 5 controls the processing process for the entire device. Data corresponding to an event table are stored in an event section 6 and the data are transmitted to a status section 7 as required. The status section 7 is constituted with a plurality of blocks for possible pipeline processing and data corresponding to an element table, and input value table and an output table are stored in the section 7. An operation section 8 consists of a plurality of operation units, the decision of a new status value of elements is executed in parallel and the result is transmitted to the event section 6.
申请公布号 JPS5814257(A) 申请公布日期 1983.01.27
申请号 JP19810111901 申请日期 1981.07.17
申请人 FUJITSU KK 发明人 KAWATO NOBUAKI
分类号 G06F11/25;G06F11/36;G06F17/50 主分类号 G06F11/25
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