| 摘要 |
PURPOSE:To make the variable-speed demodulation possible, by dividing fixedly a frequency higher than hat of a demodulation clock signal and not only counting this division output but also dividing this division output to a frequency higher than that of the demodulatin clock signal. CONSTITUTION:For example, when the reproducing speed is 10 times as high as the normal reproducing speed, a frequency FM of a reference clock signal is 2.4MHz, and the division ratio of a fixed frequency divider 33 is 30, and a frequency Fc of a reproducing speed synchronizing signal becomes 800Hz. Therefore, a counter 35 counts a frequency Fs1 on a basis of the frequency Fc by 80kHz/800Hz=100. consequently, in a variable frequency divider 32, the frequency FM is divided on a basis of the counted value of the counter 35 to output a demodulation clock signal having a frequency Fs2 of 2.4MHz/100=24kHz, and the frequency Fs2 of the demodulation clock signal becomes a value proportional to the 10-fold normal reproducing speed. Thus, the stable demodulation clock signal is obtained to make the variable-speed demodulation possible. |
